Omit generating some boilerplate

This commit is contained in:
Rerumu 2022-06-16 06:08:38 -04:00
parent c8e3777f1c
commit fc105553db
2 changed files with 8 additions and 12 deletions

View File

@ -90,9 +90,10 @@ impl Driver for Backward {
if let Some(v) = &self.last { if let Some(v) = &self.last {
v.write(mng, w)?; v.write(mng, w)?;
} else {
write!(w, "break ")?;
} }
write!(w, "break ")?;
write!(w, "end ")?; write!(w, "end ")?;
mng.pop_label(); mng.pop_label();
@ -125,9 +126,7 @@ impl Driver for If {
falsey.write(mng, w)?; falsey.write(mng, w)?;
} }
write!(w, "end ")?; write!(w, "end ")
Ok(())
} }
} }

View File

@ -15,8 +15,6 @@ use super::manager::{
impl Driver for Br { impl Driver for Br {
fn write(&self, mng: &mut Manager, w: &mut dyn Write) -> Result<()> { fn write(&self, mng: &mut Manager, w: &mut dyn Write) -> Result<()> {
write!(w, "do ")?;
if !self.align.is_aligned() { if !self.align.is_aligned() {
write_ascending("reg", self.align.new_range(), w)?; write_ascending("reg", self.align.new_range(), w)?;
write!(w, " = ")?; write!(w, " = ")?;
@ -37,7 +35,7 @@ impl Driver for Br {
write!(w, "break ")?; write!(w, "break ")?;
} }
write!(w, "end ") Ok(())
} }
} }
@ -106,9 +104,10 @@ impl Driver for Forward {
if let Some(v) = &self.last { if let Some(v) = &self.last {
v.write(mng, w)?; v.write(mng, w)?;
} else {
write!(w, "break ")?;
} }
write!(w, "break ")?;
write!(w, "end ")?; write!(w, "end ")?;
mng.pop_label(); mng.pop_label();
@ -126,9 +125,10 @@ impl Driver for Backward {
if let Some(v) = &self.last { if let Some(v) = &self.last {
v.write(mng, w)?; v.write(mng, w)?;
} else {
write!(w, "break ")?;
} }
write!(w, "break ")?;
write!(w, "end ")?; write!(w, "end ")?;
mng.pop_label(); mng.pop_label();
@ -148,7 +148,6 @@ impl Driver for BrIf {
impl Driver for If { impl Driver for If {
fn write(&self, mng: &mut Manager, w: &mut dyn Write) -> Result<()> { fn write(&self, mng: &mut Manager, w: &mut dyn Write) -> Result<()> {
write!(w, "while true do ")?;
write!(w, "if ")?; write!(w, "if ")?;
write_condition(&self.cond, mng, w)?; write_condition(&self.cond, mng, w)?;
write!(w, "then ")?; write!(w, "then ")?;
@ -161,8 +160,6 @@ impl Driver for If {
falsey.write(mng, w)?; falsey.write(mng, w)?;
} }
write!(w, "end ")?;
write!(w, "break ")?;
write!(w, "end ") write!(w, "end ")
} }
} }