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Fix underlying cause of #13

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Rerumu 2022-06-20 14:19:15 -04:00
parent 14e5f0e17d
commit a4f06afae2
1 changed files with 8 additions and 2 deletions
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10
dev-test/tests/luau_translate.rs
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@ -19,6 +19,12 @@ static ASSERTION: &str = include_str!("luau_assert.lua");
struct Luau; struct Luau;
impl Luau { impl Luau {
fn write_i32(data: i32, w: &mut dyn Write) -> Result<()> {
let data = data as u32;
write!(w, "{data}")
}
fn write_i64(data: i64, w: &mut dyn Write) -> Result<()> { fn write_i64(data: i64, w: &mut dyn Write) -> Result<()> {
let data_1 = (data & 0xFFFFFFFF) as u32; let data_1 = (data & 0xFFFFFFFF) as u32;
let data_2 = (data >> 32 & 0xFFFFFFFF) as u32; let data_2 = (data >> 32 & 0xFFFFFFFF) as u32;
@ -32,7 +38,7 @@ impl Luau {
assert_eq!(data.len(), 1, "Only one instruction supported"); assert_eq!(data.len(), 1, "Only one instruction supported");
match &data[0] { match &data[0] {
Instruction::I32Const(v) => write!(w, "{v}"), Instruction::I32Const(v) => Self::write_i32(*v, w),
Instruction::I64Const(v) => Self::write_i64(*v, w), Instruction::I64Const(v) => Self::write_i64(*v, w),
Instruction::F32Const(v) => target::write_f32(f32::from_bits(v.bits), w), Instruction::F32Const(v) => target::write_f32(f32::from_bits(v.bits), w),
Instruction::F64Const(v) => target::write_f64(f64::from_bits(v.bits), w), Instruction::F64Const(v) => target::write_f64(f64::from_bits(v.bits), w),
@ -42,7 +48,7 @@ impl Luau {
fn write_simple_expression(data: &AssertExpression, w: &mut dyn Write) -> Result<()> { fn write_simple_expression(data: &AssertExpression, w: &mut dyn Write) -> Result<()> {
match data { match data {
AssertExpression::I32(v) => write!(w, "{v}"), AssertExpression::I32(v) => Self::write_i32(*v, w),
AssertExpression::I64(v) => Self::write_i64(*v, w), AssertExpression::I64(v) => Self::write_i64(*v, w),
AssertExpression::F32(v) => target::write_f32_nan(v, w), AssertExpression::F32(v) => target::write_f32_nan(v, w),
AssertExpression::F64(v) => target::write_f64_nan(v, w), AssertExpression::F64(v) => target::write_f64_nan(v, w),