From 16ba82775b9feb672cd5b4998d437e5f7678c1d8 Mon Sep 17 00:00:00 2001 From: Rerumu Date: Sun, 28 Nov 2021 03:47:00 -0500 Subject: [PATCH] Add sign extension support --- wasm/Cargo.toml | 2 +- wasm/src/backend/ast/operation.rs | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/wasm/Cargo.toml b/wasm/Cargo.toml index 1e7ac7c..e9aee21 100644 --- a/wasm/Cargo.toml +++ b/wasm/Cargo.toml @@ -7,4 +7,4 @@ edition = "2021" [dependencies.parity-wasm] git = "https://github.com/paritytech/parity-wasm.git" -features = ["multi_value"] +features = ["multi_value", "sign_ext"] diff --git a/wasm/src/backend/ast/operation.rs b/wasm/src/backend/ast/operation.rs index 10d1f55..5a86071 100644 --- a/wasm/src/backend/ast/operation.rs +++ b/wasm/src/backend/ast/operation.rs @@ -1,6 +1,6 @@ use std::convert::TryFrom; -use parity_wasm::elements::Instruction; +use parity_wasm::elements::{Instruction, SignExtInstruction}; #[allow(non_camel_case_types)] #[derive(Clone, Copy)] @@ -144,6 +144,10 @@ pub enum UnOp { Trunc_U32_F32, Trunc_I32_F64, Trunc_U32_F64, + Extend_I32_I8, + Extend_I32_I16, + Extend_I64_I8, + Extend_I64_I16, Extend_I64_I32, Extend_U64_I32, Trunc_I64_F32, @@ -198,6 +202,10 @@ impl UnOp { Self::Trunc_U32_F32 => ("trunc", "u32_f32"), Self::Trunc_I32_F64 => ("trunc", "i32_f64"), Self::Trunc_U32_F64 => ("trunc", "u32_f64"), + Self::Extend_I32_I8 => ("extend", "i32_i8"), + Self::Extend_I32_I16 => ("extend", "i32_i16"), + Self::Extend_I64_I8 => ("extend", "i64_i8"), + Self::Extend_I64_I16 => ("extend", "i64_i16"), Self::Extend_I64_I32 => ("extend", "i64_i32"), Self::Extend_U64_I32 => ("extend", "u64_i32"), Self::Trunc_I64_F32 => ("trunc", "i64_f32"), @@ -227,6 +235,13 @@ impl TryFrom<&Instruction> for UnOp { fn try_from(inst: &Instruction) -> Result { let result = match inst { + Instruction::SignExt(ext) => match ext { + SignExtInstruction::I32Extend8S => Self::Extend_I32_I8, + SignExtInstruction::I32Extend16S => Self::Extend_I32_I16, + SignExtInstruction::I64Extend8S => Self::Extend_I64_I8, + SignExtInstruction::I64Extend16S => Self::Extend_I64_I16, + SignExtInstruction::I64Extend32S => Self::Extend_I64_I32, + }, Instruction::I32Eqz => Self::Eqz_I32, Instruction::I64Eqz => Self::Eqz_I64, Instruction::I32Clz => Self::Clz_I32,